Design for Testability in VLSI: Scan Design, ATPG, Built-In Self-Test, Fault Modeling, Test Compression, and Optimization

Prix à partir de
12,70

En vedette

COMPARER TOUS LES MAGASINS EN LIGNE (2)

Description

Design for Testability in VLSI: Scan Design, ATPG, Built-In Self-Test, Fault Modeling, Test Compression, and Optimization

Comparer les boutiques en ligne (2)

Shop
Prix
Affranchissement
Prix total
12,70 
3,00 €
15,70 
Voir l’offre
3,00 € Shipping Costs
12,70 
3,00 €
15,70 
Voir l’offre
3,00 € Shipping Costs
Description (0)

Design for Testability in VLSI: Scan Design, ATPG, Built-In Self-Test, Fault Modeling, Test Compression, and Optimization


Spécifications du produit

Marque Independently Published
EAN
  • 9798172968174

Choix en vedette
12,70 
Voir l’offre